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Monday 16 April 2012

Sample Paper for Diploma in Electronics & Communication Engineering 3rd year on Computer Architecture and Organization

DIPLOMA ELECTRONICS & COMMUNICATION ENGINEERING

SEMESTER - VI-3 YEAR

  COMPUTER ARCHITECTURE AND ORGANIZATION

 

Time: 3 hours M.Marks: 60

 

Note: - Any Attempt five questions.

All Questions carry EQUAL marks.
1. What is the use of Condition Code register?
2. What do you mean by End-around carry correction?
3. Discuss the role of Booth algorithm in the design of Fast Multipliers.
4. Why is the Wait-for-Memory-Function-Completed step needed When reading from orwriting to the main memory?
5 Explain DMA Transfer Cycle Stealing. Draw the DMA Module Diagram.

6. What is Full-Adder? Implement it stepwise Including truth table and circuit

designing one?

7. Explain the triggered flip flop & RS-flip flop?

8. Explain the kinds of operations? Draw the Figure for shift and rotate operations?

9. Why parallel processing is required at all? Some write parallel applications Where

processing is required?

NOTE: Above sample paper for Diploma in Electronics & Communication Engineering3rd year of Computer Architecture & Organization has-been created After reviewingissue papers: various universities. We are not sure whether your university or similarissue HAS Sami pattern. We always Suggest you to go inside thoroughly with text books,teachers' notes etc.. for better results.

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